1. Field of the Invention
Generally, the present disclosure relates to the manufacture of semiconductor devices, and, more specifically, to various novel methods of forming an integrated circuit (IC) product comprising a nano-sheet device and a transistor device.
2. Description of the Related Art
In modern integrated circuits, such as microprocessors, storage devices and the like, a very large number of circuit elements, especially transistors, are provided on a restricted chip area. Transistors come in a variety of shapes and forms, e.g., planar transistors, FinFET transistors, nanowire devices, etc. The transistors are typically either NMOS (NFET) or PMOS (PFET) type devices wherein the “N” and “P” designation is based upon the type of dopants used to create the source/drain regions of the devices. So-called CMOS (Complementary Metal Oxide Semiconductor) technology or products refers to integrated circuit products that are manufactured using both NMOS and PMOS transistor devices. Irrespective of the physical configuration of the transistor device, each device comprises drain and source regions and a gate electrode structure positioned above and between the source/drain regions. Upon application of an appropriate control voltage to the gate electrode, a conductive channel region forms between the drain region and the source region.
A conventional FET is a planar device wherein the entire channel region of the device is formed parallel and slightly below the planar upper surface of the semiconducting substrate. In contrast to a planar FET, there are so-called 3D devices, such as an illustrative FinFET device, which is a three-dimensional structure.
One type of device that shows promise for advanced IC products of the future is generally known as a nano-sheet device. In general, a nano-sheet device has a channel structure that is comprised of a plurality of vertically spaced-apart sheets of semiconductor material, wherein the gate structure for the device is positioned around each of these spaced-apart layers of channel semiconductor material. Such a nano-sheet device may be formed as part of a high speed logic circuit. Typically, the nano-sheet device may be operated at a relatively low voltage, e.g., 1 V or less (based on today's technology) and it is specifically designed for high-speed operation and low-power consumption (especially for IC products that are employed in mobile devices like smartphones). Typically, the design of the nano-sheet device involves the formation of a relatively thin gate insulation layer so as to permit the nano-sheet device to operate at higher switching speeds.
However, in manufacturing modern IC products, different types of transistor devices are fabricated on the same substrate. Given the different structures and design requirements of the different types of devices, developing a process flow that allows for the efficient manufacture of such IC products with these different characteristics can be very challenging. For example, in some applications, such a nano-sheet device may be fabricated on the same substrate that comprises a high voltage transistor device that is part of an input/output (I/O) circuit that is adapted to interface with outside power supplies. Such a high voltage device may be exposed to significantly higher operating voltages, e.g., 1.3 V or more (based upon today's technology), as compared to the operating voltages of other circuits within the product. In contrast to the design and structure of a nano-sheet device, the high voltage device may be required to have a much thicker gate insulation layer than that of the nano-sheet device so as to prevent dielectric breakdown when the high voltage device is exposed to much higher operating voltages. What is needed is an efficient and effective process flow for forming such different devices on the same substrate.
The present disclosure is directed to various novel methods of forming an integrated circuit (IC) product comprising a nano-sheet device and a transistor device and resulting structures that may solve or reduce one or more of the problems identified above.